Dr. Wu is presently the deputy director of the Institute of Microelectronics, Tsinghua University, Beijing, China. Dr. Wu received his Ph.D. degree in electrical engineering from Cornell University, Ithaca, NY, in 2005. Prior to that, he graduated from Tsinghua University, Beijing, China, in 2000 with double B.S. degrees in material science & engineering and enterprise management. From 2006 to 2008, he was a senior engineer in Spansion LLC, Sunnyvale, CA. He joined the Institute of Microelectronics, Tsinghua University in 2009 as an associate professor. His research interests include advanced memory device and low dimensional nanomaterial and devices. Dr. Wu has published more than 40 technical papers and owns more than 10 US patents.
A CMOS compatible graphene integrated circuit technology is developed. In contrast to traditional Si CMOS technology, this creative process is inverted process where interconnects are buried at the bottom and graphene field effect transistor (GFET) is on the top. Passive elements are fabricated in the first metal layer and GFETs are formed with buried gate/source/drain in the second metal layer. A EOT gate dielectric is employed to develop high performance GFETs. Very high device yield is achieved and RF performance of fT/fmax = 17 GHz/15.2 GHz is demonstrated at 500nm gate length devices. A graphene frequency multiplier was fabricated and showed excellent performance using this developed process. A 10GHz input and 20 GHz output performance is demonstrated. The frequency multiplier features a 3 dB bandwidth of 4 GHz and conversion gain of -26 dB.
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