Considerable progress in the fabrication of MoS2 FETs has been demonstrated recently. However, available device prototypes still suffer from a sizable hysteresis of the ID-VG characteristics and long-term drifts of threshold voltage Vth, known as bias-temperature instabilities (BTI). As such,these issues must be addressed prior to commercialization of MoS2 technologies.

Here we report on the improvement of the properties of MoS2/SiO2(25 nm) FETs introduced by the encapsulation with high-quality Al2O3(15 nm) based on a modified recipe of. The Ion/Ioff ratio of these devices is as high as 109 (Fig.1a), which is already close to predicted values. At the same time,the hysteresis is two orders of magnitude smaller than in bare exfoliated devices (Fig.1b). Furthermore,positive BTI (PBTI) in encapsulated CVD devices is weakly pronounced (Fig.1c), which is importantfor MoS2 n-FETs. Quite remarkably, PBTI is weaker than in previously reported exfoliated bareMoS2/SiO2, stacked MoS2/hBN and encapsulated BP/SiO2 FETs (Fig.1d). The reason for the reduced hysteresis and BTI, as well as for the improved device performance, is that the encapsulation layer efficiently protects the device from adsorbent-type trapping sites on top of the MoS2 channel.

Overall, we conclude that encapsulation of MoS2 FETs strongly improves their reliability andperformance, making this an important technological step toward reaching commercial quality standards.

Considerable progress in the fabrication of MoS2 FETs has been demonstrated recently. However, available device prototypes still suffer from a sizable hysteresis of the ID-VG characteristics and long-term drifts of threshold voltage Vth, known as bias-temperature instabilities (BTI). As such,these issues must be addressed prior to commercialization of MoS2 technologies.

Here we report on the improvement of the properties of MoS2/SiO2(25 nm) FETs introduced by the encapsulation with high-quality Al2O3(15 nm) based on a modified recipe of. The Ion/Ioff ratio of these devices is as high as 109 (Fig.1a), which is already close to predicted values. At the same time,the hysteresis is two orders of magnitude smaller than in bare exfoliated devices (Fig.1b). Furthermore,positive BTI (PBTI) in encapsulated CVD devices is weakly pronounced (Fig.1c), which is importantfor MoS2 n-FETs. Quite remarkably, PBTI is weaker than in previously reported exfoliated bareMoS2/SiO2, stacked MoS2/hBN and encapsulated BP/SiO2 FETs (Fig.1d). The reason for the reduced hysteresis and BTI, as well as for the improved device performance, is that the encapsulation layer efficiently protects the device from adsorbent-type trapping sites on top of the MoS2 channel.

Overall, we conclude that encapsulation of MoS2 FETs strongly improves their reliability andperformance, making this an important technological step toward reaching commercial quality standards.